Overview
| # of Channels | 1 |
|---|---|
| Data Rate(s) | DS3, E3, STS-1 |
| Clk Rec | No |
| SH/LH | n/a |
| Temperature Range (°C) | Ind. |
| Op Pwr Sup/Max Cur | 3V, 5V, ±5% |
| Package | TQFP-32 |
Communications systems require maintenance of correct data signals to ensure transmission accuracy. Errors in pulse arrival times, or phase noise can constitute line jitter.
Jitter is caused by many factors: cross-talk noise, imperfect timing recovery circuit or line interface/signal distortion. Typical WAN environments contain many pieces of equipment (nodes). At each point of connection (node), jitter can increase, and as a result, new errors can be introduced into transmitted data. To ensure reliable data reception, jitter must be reduced from the transmitted signal.
Exar's XRT71D00 jitter attenuator circuit provides a fresh approach which promises to match, or outperform other methods, and is considerably easier to deploy at a lower cost. The XRT71D00 meets the European elecommunication Standards Institute (ETSI), technical committee draft standards TBR24 (34.368 Mbits/sec digital unstructured and structured leased lines. Both TBR24, and Bellcore GR-499 require that terminal equipment, which derives its timing from the received signal at the input port, must not exceed specified output jitter levels. The XRT71D00 performs the jitter attenuation for both E3 (34.368 Mbits/sec) and DS3 (44.736 Mbits/sec)rates enabling development of full standards compliant E3/DS3 products.
The XRT71D00 is targeted at E3/DS3 applications including DSLAM, digital Multiplex and de-Multiplex equipment, ATM equipment, fiber optics and microwave radio terminals, and Pulse Code Modulation (PCM) test equipment.
The XRT71D00 is a fully integrated single-chip jitter attenuator for E3/DS3 applications designed to attenuate the jitter from the incoming clock and data signals. The device is compliant with ETSI TBR-24, ITU-T G.751,752 and 755 as well as the Bellcore GR- 499CORE Category I and Category II equipment. It supports both hardware and software modes for configuration control.
- Accepts "jittery" clock and data from an LIU IC
- Internally reduces clock and data signal jitter
- Outputs "smooth" data to the terminal equipment
- Selectable buffer size of 16- and 32-bits
- Jitter attenuator can be disabled
- Available in 24-pin SOIC, or 32-pin TQFP package
- Single 3.3V, or 5.0V supply
- Pb-Free, RoHS Compliant Versions Offered
- ETSI TBR-24 34Mbits/s D34U, and D34S systems
- DS3/E3 Digital multiplex and de-multiplex equipment
- DSLAM
- ATM equipment
- PCM Test equipment
- E3/DS3 Access equipment
Documentation & Design Tools
| Type | Title | Version | Date | File Size |
|---|---|---|---|---|
| Data Sheets | XRT71D00 E3/DS3/STS-1 Jitter Attenuator | 1.2.0 | September 2001 | 297.2 KB |
| Application Notes | TAN-200, MaxLinear APIs - OS Portability | 1.0.0 | August 2007 | 88.5 KB |
| Application Notes | TAN-075, DS-3/E3 LIU Layout Recommendations | 1.0.0 | February 2007 | 29.8 KB |
| Application Notes | TAN-025, Interfacing the Microprocessor Serial Interface of the XRT730X Family of DS3/E3/STS-1 LIU Devices to the SPI Port of the MC68360 QUICC Device | 1.3 | July 2004 | 16 KB |
Parts & Purchasing
| Part Number | Pkg Code | Status | Suggested Replacement | PDN |
|---|---|---|---|---|
| XRT71D00IQ-F | LQFP32 | OBS |
Active - the part is released for sale, standard product.
EOL (End of Life) - the part is no longer being manufactured, there may or may not be inventory still in stock.
CF (Contact Factory) - the part is still active but customers should check with the factory for availability. Longer lead-times may apply.
PRE (Pre-introduction) - the part has not been introduced or the part number is an early version available for sample only.
OBS (Obsolete) - the part is no longer being manufactured and may not be ordered.
NRND (Not Recommended for New Designs) - the part is not recommended for new designs.
Packaging
| Pkg Code | Details | Quantities | Dimensions |
|---|---|---|---|
| LQFP32 |
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Notifications
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