GPY112 (PEF7072)

1G Ethernet PHY, SGMII, RGMII or GMII, Industrial Temp
Data Sheets OBS (Obsolete)

Overview

Information 1G Ethernet PHY, SGMII, RGMII or GMII, Industrial Temp
Ethernet Bandwidth (Mbps) 10, 100, 1000
Interfaces MII, GMII, RGMII, SGMII
MACSEC No
1588v2 No
SyncE No
EEE Yes
Thermal Sensor No
Min Temp (°C) -40
Max Temp (°C) 85
Package LQFP-64
X x Y Package Dimension (mm) 10 x 10
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The GPY112 is an ultra-low power, multi-mode Gigabit Ethernet (GbE) PHY IC, supporting speeds of 10, 100 and 1000 Mbit/s in full-duplex or half-duplex mode. It can be used in various data flows based on twisted-pair and fiberoptic communication links. The main application is the copper mode, where Media-Independent Interface (MII) data is converted to a Media-Dependent Interface (MDI) based on the 10BASE-T(e), 100BASE-TX and 1000BASE-T Ethernet standards.
 
The GPY112 supports a number of features for convenience and reliability, including auto-negotiation, auto-MDIX, auto-downspeed and cable wiring fault correction. In addition, the integrated cable diagnostics mode, the test packet generator, and the various test loops can be used for analysis and debugging of the target system. The GPY112 includes an integrated serializer/deserializer (SerDes) that can be used to operate a fiber link in conjunction with a 1000BASE-X fiber module. This capability enables data flow applications like media converters and dual-media flows with media auto-detection, as well as simple MII-to-fiber modes.
 
The MII pins of the GPY112 can be re-assigned to form one of several standard MII interfaces such as MII, RMII, GMII, RGMII and SGMII. In RGMII mode, the integrated delay function for the TX and RX clock simplifies PCB design. In SGMII mode, the PHY does not require a receive clock and instead uses the integrated Clock and Data Recovery (CDR).

Interfaces:

  • Twisted-pair interface:
    • 10BASE-T(e), 100BASE-TX, 1000BASE-T1)
  • Data interfaces (xMII1):
    • MII
    • RMII
    • GMII
    • RGMII
    • SGMII SerDes at 1.25 Gbaud
    • 1000BASE-X SerDes at 1.25 Gbaud
    • Jumbo packets of up to 10 kB
  • Control interfaces:
    • MDIO
    • JTAG interface for boundary scan
    • Support of stand-alone operational mode using EEPROM interface (I2C)
  • Clocking:
    • Support of 25MHz and 125MHz input clock
    • Support of 25MHz crystal using integrated oscillator
    • 25MHz clock output
Ethernet:
  • Auto-negotiation with next-page support
  • Wake-on-LAN support
  • Auto-downspeed
  • Support of auto-MDIX at all copper media speeds
  • Support of auto polarity-correction at all copper media speeds
  • Various test features:
    • Test loops
    • Dummy frame generation and frame error counters
    • Analog self-test
  • Cable diagnostics:
    • Cable open/short detection
    • Cable length estimation
External Circuitry Optimization:
  • Integrated termination resistors at twisted-pair interface
  • Integrated termination resistors at RGMII
  • Support of low-cost transformers (magnetics)
  • Support of low-cost crystal

  • Copper Applications
  • Media Converter Applications
  • Gigabit Interface Converter (GBIC) Applications

Documentation & Design Tools

Type Title Version Date File Size
Data Sheets GPY112 (PEF7072HLV16) User`s Manual Hardware Description 1.3 October 2020 2.3 MB
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Parts & Purchasing

Part Number Product ID (MMID) Packaging Type Min Temp Max Temp Status Suggested Replacement PDN
PEF7072HLV16 947047 Tray -40 85 OBS
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Part Status Legend
Active - the part is released for sale, standard product.
EOL (End of Life) - the part is no longer being manufactured, there may or may not be inventory still in stock.
CF (Contact Factory) - the part is still active but customers should check with the factory for availability. Longer lead-times may apply.
PRE (Pre-introduction) - the part has not been introduced or the part number is an early version available for sample only.
OBS (Obsolete) - the part is no longer being manufactured and may not be ordered.
NRND (Not Recommended for New Designs) - the part is not recommended for new designs.