PM7538B

SyntheCLK-ADV Jitter Attenuator + Multi-Output Clock Synthesizer

Description

The PM7538 SyntheCLK-ADV™ is a high- performance jitter attenuator and multi-output clock synthesizer that provides ultra-low jitter and phase noise outputs. A cascaded PLL architecture, with 18 independent dividers and clock drivers, provides a solution that is tailored to a wide variety of wireless base station applications that require a highly integrated low-power clocking solution.

The Jitter Attenuator (JAT) PLL filters jitter on the incoming reference clock and synchronizes an external VCXO. The clock synthesizer PLL uses a high performance VCO to provide a high-frequency master clock which is provided to the 18-output divider and driver array.

By cascading the clock synthesizer PLL with the JAT PLL, this architecture provides superior phase noise performance over a wide range of output frequencies using a low-cost, low-frequency VCXO. In addition to the superior output phase noise and jitter performance, the SyntheCLK-ADV offers a variety of features targeted at implementing JESD204B based designs.

Features

Jitter Attenuator PLL (PLL1)
  • Accepts single ended or differential VCXO and reference clock inputs from 30.72MHz to 614.4MHz
  • Four independent reference clock input ports with digital reference clock stability monitoring (LOS detection)
  • Support for automatic and manual holdover modes
  • Dynamic JAT PLL settling provides fast locking at start-up and low bandwidth for optimal jitter attenuation
  • Dedicated differential VCXO buffered output; may use three additional LVCLK output pairs for a total of four VCXO buffered outputs
  • Dual Lock indication status pins for PLL1 and PLL2, which may optionally be combined onto one pin

Clock Synthesizer PLL (PLL2)
  • Wideband VCO supporting master clock (MCLK) rates up to 3200MHz
  • Support for external VCO
  • Low-noise PFD and charge pump operates at up to 153.6MHz
  • Optional zero-delay operation

Documentation

Contact Sales to request additional information.

Application

  • Low jitter, low phase noise clock distribution
  • Clocking high performance ADCs, DACs, RF synthesizers, FPGAs
  • JEDEC JESD204B applications
  • High performance wireless transceivers
  • Broadband wireless infrastructure

Design Tools

Packaging

Parts & Purchasing

Part Number Pkg Code Min Temp Max Temp Status Buy Now Order Samples
PM7538B-F4EI -40 85 Active
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Part Status Legend
Active - the part is released for sale, standard product.
EOL (End of Life) - the part is no longer being manufactured, there may or may not be inventory still in stock.
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PRE (Pre-introduction) - the part has not been introduced or the part number is an early version available for sample only.
OBS (Obsolete) - the part is no longer being manufactured and may not be ordered.
NRND (Not Recommended for New Designs) - the part is not recommended for new designs.

Quality & Environmental Data

Click on the links above to download the Certificate of Non-Use of Hazardous Substances.

Additional Quality Documentation may be available, please contact customersupport@maxlinear.com.

Frequently Asked Questions