XRT83VSH314

The XRT83VSH314 is a fully integrated 14-channel short-haul line interface unit (LIU) that operates from a 1.8V Inner Core and 3.3V I/O power supplies. Using internal termination, the LIU provides one bill of materials to operate in T1, E1, or J1 mode independently on a per channel basis with minimum external components. The LIU features are programmed through a standard microprocessor interface. EXAR's LIU has patented high impedance circuits that allow the transmitter outputs and receiver inputs to be high impedance when experiencing a power failure or when the LIU is powered off. Key design features within the LIU optimize 1:1 or 1+1 redundancy and non-intrusive monitoring applications to ensure reliability without using relays.

The on-chip clock synthesizer generates T1/E1/J1 clock rates from a selectable external clock frequency and has five output clock references that can be used for external timing (8kHz, 1.544Mhz, 2.048Mhz, nxT1/J1, nxE1).

Additional features include RLOS, a 16-bit LCV counter for each channel, AIS, QRSS/PRBS generation/detection, TAOS, DMO, and diagnostic loopback modes.

• Fully integrated 14-Channel short haul transceivers for T1/J1 (1.544MHz) and E1 (2.048MHz) applications
• T1/E1/J1 short haul and clock rate are per port selectable through software without changing components
• Internal Impedance matching on both receive and transmit for 75Ω (E1), 100Ω (T1), 110Ω (J1), and 120Ω (E1) applications are per port selectable through software without changing components
• Power down on a per channel basis with independent receive and transmit selection
• Five pre-programmed transmit pulse settings for T1 short haul applications per channel
• User programable Arbitrary Pulse mode
• On-Chip transmit short-circuit protection and limiting protects line drivers from damage on a per channel basis
• Selectable Crystal-Less digital jitter attenuators (JA) with 32-Bit or 64-Bit FIFO for the receive or transmit path
• Driver failure monitor output (DMO) alerts of possible system or external component problems
• Transmit outputs and receive inputs may be "High" impedance for protection or redundancy applications on a per channel basis
• Support for automatic protection switching
• 1:1 and 1+1 protection without relays
• Receive monitor mode handles 0 to 6dB resistive attenuation (flat loss) along with 0 to 6dB cable loss for both T1 and E1
• Loss of signal (RLOS) according to ITU-T G.775/ETS300233 (E1) and ANSI T1.403 (T1/J1)
• Programmable data stream muting upon RLOS detection
• On-Chip HDB3/B8ZS encoder/decoder with an internal 16-bit LCV counter for each channel
• On-Chip digital clock recovery circuit for high input jitter tolerance
• QRSS/PRBS pattern generator and detection for testing and monitoring
• Error and bipolar violation insertion and detection
• Transmit all ones (TAOS) Generators and Detectors
• Supports local analog, remote, digital, and dual loopback modes
• 1.8V Digital Core
• 3.3V I/O and Analog Core
• 304-Pin BGA package
• -40°C to +85°C Temperature Range
• Supports gapped clocks for mapper/multiplexer applications

• T1 Digital Cross Connects (DSX-1)
• ISDN Primary Rate Interface
• CSU/DSU E1/T1/J1 Interface
• T1/E1/J1 LAN/WAN Routers
• Public Switching Systems and PBX Interfaces
• T1/E1/J1 Multiplexer and Channel Banks
• Integrated Multi-Service Access Platforms (IMAPs)
• Integrated Access Devices (IADs)
• Inverse Multiplexing for ATM (IMA)
• Wireless Base Stations
• Pb-Free, RoHS Compliant Versions Offered