Overview
Information | Dual UART with Higher Operating Speed and Lower Access Time |
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Data Bus Interface | Intel |
# of Channels | 2 |
Max Data Rate 5V (Mbps) | 1.5 |
Max Data Rate 3.3V (Mbps) | 1 |
Max Data Rate 2.5V (Mbps) | na |
Max Data Rate 1.8V (Mbps) | na |
Tx FIFO (Bytes) | 1 |
Rx FIFO (Bytes) | 1 |
Auto Flow Control | |
Auto RS-485 Half-Duplex Control | |
Multidrop (9-bit) Mode | |
Fractional Baud Rate Generator | |
Power Down Mode | |
Supply Voltage Range VCC (V) | 2.97 to 5.5 |
Auto RTS/CTS | |
Package | PLCC-44 |
FIFO Level Counters | |
Selectable/ Programable Trigger Levels | |
IrDA Sup | |
5V Tolerant Inputs | ✔ |
Max UART/GPIO Input Voltage (V) | 5.5 |
Max UART/GPIO Output Voltage (V) | VCC |
Temperature Range (°C) | -40 to 85 |
The ST16C2450 (2450) is a dual universal asynchronous receiver and transmitter (UART). The ST16C2450 is an improved version of the NS16450 UART with higher operating speed and lower access time. The 2450 provides enhanced UART functions with a modem control interface, and data rates up to 1.5Mbps. Onboard status registers provide the user with error indications and operational status.
System interrupts and modem control features may be tailored by external software to meet specific user requirements. An internal loop-back capability allows onboard diagnostics. Independent programmable baud rate generators are provided to select transmit and receive clock rates from 50 Bps to 1.5 Mbps. The Baud rate generator can be configured for either crystal or external clock input.
The 2450 is available in a 40-pin plastic-DIP, 44-pin PLCC, and 48-pin TQFP packages. The 2450 is fabricated in an advanced CMOS process to achieve low drain power and high speed requirements.
- Pin and functionally compatible to ST16C2550, Software compatible with INS8250
- 1.5 Mbps transmit/receive operation (24MHz Max.)
- Independent transmit and receive UART control
- Four selectable Receive FIFO interrupt trigger levels
- Modem control signals (-CTS, -RTS, -DSR, -DTR, -RI, -CD)
- Programmable character lengths (5, 6, 7, 8) with even, odd, or no parity
- Status report register
- Crystal or external clock input
- 460.8 Kbps transmit/receive operation with 7.3728MHz crystal or external clock source
- TTL compatible inputs, outputs
- Pb-Free, RoHS Compliant Versions Offered
- Portable Appliances
- Telecommunication Network Routers
- Ethernet Network Routers
- Cellular Data Devices
- Factory Automation and Process Controls
Documentation & Design Tools
Type | Title | Version | Date | File Size |
---|---|---|---|---|
Data Sheets | ST16C2450 2.97V to 5.5V DUART | 4.0.1 | May 2005 | 524.6 KB |
Application Notes | DAN-180, Use of MaxLinear’s ST16C2550 with Linux 2.4.X & 2.6.X OS, Phoenix Bios Version 4.0 Release 6.0 and Windows Operating Systems | 1.0.1 | October 2007 | 93.3 KB |
Application Notes | DAN-108, UART Crystal Oscillator Design Guide | 1.0.0 | March 2000 | 218.1 KB |
Application Notes | DAN-107, Interfacing 16Cxxx UARTs to a CPU | 1.0.0 | August 1999 | 32.4 KB |
Application Notes | General UART Application Note | 1.0.0 | December 1996 | 39.8 KB |
Application Notes | AN-2450/AN-2550, ST16C2450 and ST16C2550 Application Example | 1.0.0 | December 1996 | 64.4 KB |
User Guides & Manuals | Evaluation Board User's Manual | 1.3.0 | August 2003 | 24.7 KB |
Product Brochures | Interface Brochure | R01 | June 2024 | 3.6 MB |
Schematics & Design Files | ISA Eval Board Schematic | 1.4.0 | August 2007 | 109 KB |
Schematics & Design Files | PCI Eval Board Schematic | 1.1.0 | July 2007 | 167.8 KB |
Software: Drivers | Linux 2.6.13 | 1.0.0 | December 2009 | 10.8 KB |
Software: Drivers | Linux 2.6.18 | 1.0.0 | December 2009 | 12.1 KB |
Software: Drivers | Windows XP & 2000 | 1.3.0.0 | December 2009 | 61 KB |
Quality & RoHS
Parts & Purchasing
Part Number | Pkg Code | Min Temp | Max Temp | Status | Suggested Replacement | Buy Now | Order Samples | PDN |
---|---|---|---|---|---|---|---|---|
ST16C2450CJ44-F | PLCC44 | 0 | 70 | Active | Order | |||
ST16C2450CJ44TR-F | PLCC44 | 0 | 70 | OBS | ST16C2450CJ44-F | |||
ST16C2450CP40 | PDIP40 | 0 | 70 | OBS | ST16C2450CP40-F | |||
ST16C2450CP40-F | PDIP40 | 0 | 70 | OBS | ST16C2450CJ44-F , ST16C2450CQ48-F | |||
ST16C2450CQ48-F | TQFP48 | 0 | 70 | OBS | ST16C2550CQ48-F | |||
ST16C2450CQ48TR-F | TQFP48 | 0 | 70 | OBS | ST16C2450CQ48-F | |||
ST16C2450IJ44-F | PLCC44 | -40 | 85 | OBS | ST16C2550IJ44-F | |||
ST16C2450IJ44TR-F | PLCC44 | -40 | 85 | OBS | ST16C2450IJ44-F | |||
ST16C2450IP40 | PDIP40 | -40 | 85 | OBS | ST16C2450IP40-F | |||
ST16C2450IP40-F | PDIP40 | -40 | 85 | OBS | ST16C2450IJ44-F , ST16C2450IQ48-F | |||
ST16C2450IQ48-F | TQFP48 | -40 | 85 | OBS | ST16C2550IQ48-F | |||
ST16C2450IQ48TR-F | TQFP48 | -40 | 85 | OBS | ST16C2450IQ48-F |
Active - the part is released for sale, standard product.
EOL (End of Life) - the part is no longer being manufactured, there may or may not be inventory still in stock.
CF (Contact Factory) - the part is still active but customers should check with the factory for availability. Longer lead-times may apply.
PRE (Pre-introduction) - the part has not been introduced or the part number is an early version available for sample only.
OBS (Obsolete) - the part is no longer being manufactured and may not be ordered.
NRND (Not Recommended for New Designs) - the part is not recommended for new designs.
Packaging
Pkg Code | Details | Quantities | Dimensions |
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PDIP40 |
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PLCC44 |
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TQFP48 |
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Notifications
FAQs & Support
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Please check that all the following conditions are satisfied first.
- no interrupts pending (ISR bit-0 = 1)
- modem inputs are not toggling (MSR bits 0-3 = 0)
- RX input pin is idling HIGH • divisor (the value in DLL register) is non-zero
- TX and RX FIFOs are empty
Be sure sleep mode bit has been set to 1. If there are multiple UART channels, the sleep conditions must be true for all channels.
See more on Sleep Mode in AN204 UART Sleep Mode.
Yes. Note: some devices do have powersave mode. If UART goes into powersave mode, then the registers are not accessible.
See more on Sleep Mode in AN204 UART Sleep Mode.
Read LSR register to check whether the UART receives the data or not.
- If LSR value is 0x60, it means that either UART receiver FIFO doesn’t receive the data or the data in receiver FIFO has been read out before the read of LSR.
- If LSR value is 0x00, it means data is still in the THR (clock doesn’t oscillate to transmit data).
- If LSR value is 0xFF, it means either UART is in powersave mode or UART is powered off. For those devices with powersave mode, be sure that UARTS are not in powersave mode.
See more on Sleep Mode in AN204 UART Sleep Mode.
- Check whether the register set can be accessed.
- Check whether the crystal is oscillating fully.
- Check whether the data can be transmitted in internal loopback mode.
See more on Sleep Mode in AN204 UART Sleep Mode.