The ST16C450 is a universal asynchronous receiver and transmitter. The ST16C450 is an improved version of the NS16450 UART with higher operating speed and lower access time. A programmable baud rate generator is provided to select transmit and receive clock rates from 50 bps to 1.5 Mbps.
The ST16C450 on board status registers provides the error conditions, type and status of the transfer operation being performed. Included is complete MODEM control capability, and a processor interrupt system that may be software tailored to the user’s requirements. The ST16C450 provides internal loop- back capability for on board diagnostic testing.
The ST16C450 is available in 40 pin PDIP, 44 pin PLCC, and 48 pin TQFP packages. It is fabricated in an advanced CMOS process to achieve low drain power and high speed requirements.
Pin to pin and functionally compatible to the Industry Standard 16450
1.5 Mbps transmit/receive operation (24MHz)
Programmable word lengths (5, 6, 7, 8)
Even, odd, force, or no parity generation and detection
Part Status Legend Active - the part is released for sale, standard product. EOL (End of Life) - the part is no longer being manufactured, there may or may not be inventory still in stock. CF (Contact Factory) - the part is still active but customers should check with the factory for availability. Longer lead-times may apply. PRE (Pre-introduction) - the part has not been introduced or the part number is an early version available for sample only. OBS (Obsolete) - the part is no longer being manufactured and may not be ordered. NRND (Not Recommended for New Designs) - the part is not recommended for new designs.
Quality & Environmental Data
Click on the links above to download the Certificate of Non-Use of Hazardous Substances.
Qualification of ANST as an alternate manufacturing site.
Updated information subsequent to original published PCN 13-0834-03 on 04/02/2014. ASE Malaysia as alternate assembly site Addition of qualified alternate assembly site of 28, 44, 68L PLCC packaged products.
Elimination of back mark. Eliminate back mark; consolidate information in top mark.
Qualification of ASE Malaysia for assembly of 28, 44, 68L PLCC packaged products. Alternate assembly site.
Addition of an alternate qualified assembly site, ASE Chung-Li (Taiwan). Material change and alternate assembly site.
Exar has qualified Millennium Microtech/Thailand as an alternate assembly supplier for 28, 44 and 68 lead PLCC packages in addition to the existing supplier, Unisem/Indonesia. Capacity enhancement
Product Discontinuation Notice
In support of “green” initiatives, the listed leaded part numbers will be discontinued by Exar.
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Frequently Asked Questions
LSR bit-6 is a superset of LSR bit-5. The transmitter consists of a TX FIFO (or THR only when FIFOs are not enabled) and a Transmit Shift Register (TSR). When LSR bit-5 is set, it indicates that the TX FIFO (or THR) is empty, however there may be data in the TSR. When LSR bit-6 is set, it indicates that the transmitter (TX FIFO + TSR) is completely empty.
You can tell by reading LSR bit-5 or bit-6. If they are '0', then the transmit interrupt was generated by the trigger level. If they are '1', then the transmit interrupt was generated by the TX FIFO becoming empty. For enhanced UARTs, you can just read the FIFO level counters.
An RX Data Ready interrupt is generated when the number of bytes in the RX FIFO has reached the RX trigger level. An RX Data Timeout interrupt is generated when the RX input has been idle for 4 character + 12 bits time.
For some UARTs, the RX Data Timeout interrupt has a higher priority and in others, the RX Data Ready interrupt has a higher priority. See the interrupt priority section of the datasheet.
The UART requires a clock and a valid baud rate in order to transmit and receive data. Check that there is a clock signal on the XTAL1 input pin. Also, valid divisors need to be written into the DLL and DLM registers. Most UARTs have random (invalid) values upon power-up.
For most UARTs, the interrupt is generated when the data is ready to be read from the RX FIFO. The are some UARTs that generate the interrupt when the character with the error is received. There are some UARTs that have a register bit to select whether the LSR interrupt is generated immediately or delayed until it is ready to be read.
The UART will enter the sleep mode if the following conditions have been satisfied for all channels:
No, Auto RTS and Auto CTS are independent. Auto RTS is toggled by the UART receiver. Auto CTS is monitored by the UART Transmitter.
No, Auto RTS and Auto CTS will work normally without the interrupts enabled.
No, software flow control characters are not loaded into the RX FIFO.
Since 2-character software flow control requires that 2 consecutive flow control characters match before data transmission is stopped or resumes, there is less of a chance that data transmission is stopped because one data byte matched a control character.
Auto RS485 Half-Duplex Control feature overrides the Auto RTS flow control feature if both features use the RTS# output pin. Both features can only be used simultaneously if the Auto RS485 control output is not the RTS# output. For some UARTs, the Auto RS485 control output is not the RTS# output.
Most UARTs use RTS#, however the XR16C850 and XR16C864 use the OP1# output as the Auto RS485 control output. In addition to using the RTS# output as the Auto RS485 control output, the XR16L784, XR16L788 and XR16V798 can use the DTR# output as the Auto RS485 control output.
The polarity of the RS485 control output varies from one UART to another. For some UARTs, an inverter may be required. Some of the newer UARTs have register bits that can change that polarity of the RS485 control output.
In the normal mode, the TX interrupt is generated when the TX FIFO is empty, and there may still be data in the Transmit Shift Register. In the RS485 mode, the TX interrupt is generated when the TX FIFO and the TSR register are both empty.
It is recommended that the FIFO counters at the Scratchpad Register location be used. When transmitting or receiving data, writing to the LCR register could result in transmit and/or receive data errors.
Due to the dynamic nature of the FIFO counters, it is recommended that the FIFO counter registers be read until consecutive reads return the same value.
All of the UARTs that have the IR mode supports up to 115.2Kbps as specified in IrDA 1.0. The newer I2C/SPI UARTs can support up to 1.152Mbps as specified in IrDA 1.1.
For external clock frequencies above 24MHz at the XTAL1 input, a 2K pull-up may be necessary to improve the rise times if there are data transmission errors.
Yes, you can daisy-chain it like that, but only up to 2 times (3 UARTs total in the daisy-chain). The UARTs should be as close as possible.
No, it just has to meet the minimum high and low pulse widths.
Yes, if you are using a UART with a fractional baud rate generator. This provides a divisor feature with a granularity of 1/16, allowing for any baud rate to be generated by any clock frequency, standard or non-standard. Click on the parametric search button of the product family page and find the Fractional Baud Rate Generator column which tells which products have this feature.
They crystal oscillator circuitry is recommended for fundamental frequency crystals only. The maximum frequency for crystals with fundamental frequencies is typically 24MHz. Above that frequency, crystals operate at higher harmonics, which will not work with the recommended crystal oscillator circuitry.
No. It is only required for transmitting and receiving data.
The best way to determine this is to go to maxlinear.com and type the part into the search function. At or near the top of the results you should see something that looks like:
In this example, we looked for XRA1201. Click on part number header or on the link at the bottom of the result. This brings you to the product page. For example:
Click on Parts & Purchasing, highlighted with the blue arrow above. The screen changes to:
Notice the status column and the “Show obsolete parts” link. A legend tells you the definition of the different statuses. Click on the “Show obsolete parts” link to see EOL or OBS part numbers along with the Active part numbers, the legend still present:
Another method to find out if a part is OBS or EOL is to click on SUPPORT at the top:
And then Product Change Notifications:
Type the part into the search, and click on one of the part numbers from the drop down menu. Then you can look for the Product Discontinuation Notice, which generally is at the top of the list, for example:
If you see this, it tells you that this particular orderable part has been discontinued and when the last order date is, or was. If you click on the file, then you can view the notice we sent about this if you purchased the part in the recent past. It may also advise of a replacement part. When an orderable part first becomes discontinued, Product Discontinuation Notices are sent are sent to those who have purchased the parts in the recent past, if purchased directly, with a dated opportunity to place a last order.
It depends on the baud rate. For example, for a start bit, 8 data bits, no stop bit and 1 stop bit, the maximum baud rate deviation is 4.76%. For more information, see https://www.exar.com/appnote/dan108.pdf
Please check that all the following conditions are satisfied first.
no interrupts pending (ISR bit-0 = 1)
modem inputs are not toggling (MSR bits 0-3 = 0)
RX input pin is idling HIGH • divisor (the value in DLL register) is non-zero
TX and RX FIFOs are empty
Be sure sleep mode bit has been set to 1. If there are multiple UART channels, the sleep conditions must be true for all channels.
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