Overview
Information | Quad UART with 64-Byte FIFO and Infrared (IrDA) Encoder/Decoder |
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Data Bus Interface | Intel, Motorola |
# of Channels | 4 |
Max Data Rate 5V (Mbps) | 1.5 |
Max Data Rate 3.3V (Mbps) | 0.5 |
Max Data Rate 2.5V (Mbps) | na |
Max Data Rate 1.8V (Mbps) | na |
Tx FIFO (Bytes) | 64 |
Rx FIFO (Bytes) | 64 |
Auto Flow Control | ✔ |
Auto RS-485 Half-Duplex Control | |
Multidrop (9-bit) Mode | |
Fractional Baud Rate Generator | |
Power Down Mode | ✔ |
Supply Voltage Range VCC (V) | 2.97 to 5.5 |
Auto RTS/CTS | ✔ |
Package | LQFP-64 |
FIFO Level Counters | |
Selectable/ Programable Trigger Levels | S |
IrDA Sup | ✔ |
5V Tolerant Inputs | |
Max UART/GPIO Input Voltage (V) | VCC |
Max UART/GPIO Output Voltage (V) | VCC |
Temperature Range (°C) | -40 to 85 |
The ST16C6541 is a universal asynchronous receiver and transmitter (UART) with a dual foot print interface compatible with the ST16C554 and ST68C554. The 654 is an enhanced UART with 64 byte FIFOs, automatic hardware/software flow control, and data rates up to 1.5Mbps. Onboard status registers provide the user with error indications and operational status, modem interface control. System interrupts may be tailored to meet user requirements. An internal loop-back capability allows onboard diagnostics.
The 654 is available in a 64-pin LQFP package. The 64-pin package offers the 16 interface mode which is compatible with the industry standard ST16C554.
The ST16C654DCQ64 provides constant active interrupt outputs. The 64 pin devices do not offer TXRDY/RXRDY outputs or the default clock select option (CLKSEL). The 654 combines the package interface modes of the 16C454/554 and 68/C454/554 series on a single integrated chip.
NOTE: 1 Covered by U.S. Patent #5,649,122.
- Compatibility with the Industry Standard ST16C454/554, ST68C454/554, TL16C554
- 1.5 Mbps transmit/receive operation (24MHz)
- 64 byte transmit FIFO
- 64 byte receive FIFO with error flags
- Automatic software/hardware flow control
- Programmable Xon/Xoff characters
- Independent transmit and receive control
- Software selectable Baud Rate Generator pre-scaleable clock rates of 1X, 4X
- Four selectable Transmit/Receive FIFO interrupt trigger levels
- Standard modem interface or infrared IrDA encoder/decoder interface
- Software flow control turned off optionally by any (Xon) RX character
- Independent MIDI interface on 100 pin packages
- 100-pin packages offer internal register FIFO monitoring and separate IrDA TX outputs
- Sleep mode ( 200mA stand-by)
- Pb-Free, RoHS Compliant Versions Offered
- Portable Appliances
- Telecommunication Network Routers
- Ethernet Network Routers
- Cellular Data Devices
- Factory Automation and Process Controls
Documentation & Design Tools
Type | Title | Version | Date | File Size |
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Data Sheets | ST16C654/654D 2.97V to 5.5V Quad UART with 64-Byte FIFO | 5.0.2 | August 2005 | 1.1 MB |
Application Notes | AN-204, UART Sleep Mode | 1.0.0 | June 2010 | 515.8 KB |
Application Notes | DAN-134, ST16C654 vs. TL16C754B | 1.0.0 | June 2002 | 72.5 KB |
Application Notes | DAN-133, ST16C554 vs TL16C554 | 1.0.0 | April 2002 | 94.4 KB |
Application Notes | DAN-108, UART Crystal Oscillator Design Guide | 1.0.0 | March 2000 | 218.1 KB |
Application Notes | DAN-107, Interfacing 16Cxxx UARTs to a CPU | 1.0.0 | August 1999 | 32.4 KB |
Application Notes | General UART Application Note | 1.0.0 | December 1996 | 39.8 KB |
User Guides & Manuals | Evaluation Board User's Manual | 2.0.0 | August 2003 | 17.3 KB |
Product Brochures | Interface Brochure | R01 | June 2024 | 3.6 MB |
Schematics & Design Files | ISA Eval Board Schematic | 1.1.0 | September 2007 | 187.4 KB |
Quality & RoHS
Part Number | RoHS | Exempt | RoHS | Halogen Free | REACH | TSCA | MSL Rating / Peak Reflow | Package |
---|---|---|---|---|---|---|---|
ST16C654DCQ64-F | N | Y | Y | Y | Y | L3 / 260ᵒC | LQFP64 |
ST16C654DIQ64-F | N | Y | Y | Y | Y | L3 / 260ᵒC | LQFP64 |
Click on the links above to download the Certificate of Non-Use of Hazardous Substances.
Parts & Purchasing
Part Number | Pkg Code | Min Temp | Max Temp | Status | Suggested Replacement | Buy Now | Order Samples | PDN |
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ST16C654DCQ64 | LQFP64 | 0 | 70 | OBS | ||||
ST16C654DCQ64-F | LQFP64 | 0 | 70 | Active | Order | |||
ST16C654DCQ64TR-F | LQFP64 | 0 | 70 | OBS | ST16C654DCQ64-F | |||
ST16C654DIQ64 | LQFP64 | -40 | 85 | OBS | ||||
ST16C654DIQ64-F | LQFP64 | -40 | 85 | Active | Order | |||
ST16C654DIQ64TR-F | LQFP64 | -40 | 85 | OBS | ST16C654DIQ64-F |
Active - the part is released for sale, standard product.
EOL (End of Life) - the part is no longer being manufactured, there may or may not be inventory still in stock.
CF (Contact Factory) - the part is still active but customers should check with the factory for availability. Longer lead-times may apply.
PRE (Pre-introduction) - the part has not been introduced or the part number is an early version available for sample only.
OBS (Obsolete) - the part is no longer being manufactured and may not be ordered.
NRND (Not Recommended for New Designs) - the part is not recommended for new designs.
Packaging
Pkg Code | Details | Quantities | Dimensions |
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LQFP64 |
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Notifications
FAQs & Support
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Please check that all the following conditions are satisfied first.
- no interrupts pending (ISR bit-0 = 1)
- modem inputs are not toggling (MSR bits 0-3 = 0)
- RX input pin is idling HIGH • divisor (the value in DLL register) is non-zero
- TX and RX FIFOs are empty
Be sure sleep mode bit has been set to 1. If there are multiple UART channels, the sleep conditions must be true for all channels.
See more on Sleep Mode in AN204 UART Sleep Mode.
Yes. Note: some devices do have powersave mode. If UART goes into powersave mode, then the registers are not accessible.
See more on Sleep Mode in AN204 UART Sleep Mode.
Read LSR register to check whether the UART receives the data or not.
- If LSR value is 0x60, it means that either UART receiver FIFO doesn’t receive the data or the data in receiver FIFO has been read out before the read of LSR.
- If LSR value is 0x00, it means data is still in the THR (clock doesn’t oscillate to transmit data).
- If LSR value is 0xFF, it means either UART is in powersave mode or UART is powered off. For those devices with powersave mode, be sure that UARTS are not in powersave mode.
See more on Sleep Mode in AN204 UART Sleep Mode.
- Check whether the register set can be accessed.
- Check whether the crystal is oscillating fully.
- Check whether the data can be transmitted in internal loopback mode.
See more on Sleep Mode in AN204 UART Sleep Mode.