XR68C681
Overview
Information | Dual UART with Two Fully Independent Full Duplex Asynchronous Communications Channels |
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Data Bus Interface | Motorola |
# of Channels | 2 |
Max Data Rate 5V (Mbps) | 1 |
Max Data Rate 3.3V (Mbps) | na |
Max Data Rate 2.5V (Mbps) | na |
Max Data Rate 1.8V (Mbps) | na |
Tx FIFO (Bytes) | 1 |
Rx FIFO (Bytes) | 3 |
Auto Flow Control | ✔ |
Auto RS-485 Half-Duplex Control | |
Multidrop (9-bit) Mode | ✔ |
Fractional Baud Rate Generator | |
Power Down Mode | ✔ |
Supply Voltage Range VCC (V) | 4.5 to 5.5 |
Auto RTS/CTS | ✔ |
Package | PLCC-44 |
FIFO Level Counters | |
Selectable/ Programable Trigger Levels | |
IrDA Sup | |
5V Tolerant Inputs | |
Max UART/GPIO Input Voltage (V) | VCC |
Max UART/GPIO Output Voltage (V) | VCC |
Temperature Range (°C) | -40 to 85 |
The MaxLinear Dual Universal Asynchronous Receiver and Transmitter (DUART) is a data communications device that provides two fully independent full duplex asynchronous communications channels in a single package. The DUART is designed for use in microprocessor based systems and may be used in a polled or interrupt driven environment.
The XR-68C681 device offers a single IC solution for the 68000 family of microprocessors.
The DUART is fabricated using advanced two layer metal, with a high performance density EPI/CMOS 1.8 process to provide high performance and low power consumption, and is packaged in a 40 pin DIP or a 44 pin PLCC.
- Two Full Duplex, Independent Channels
- Asynchronous Receiver and Transmitter
- Quadruple-Buffered Receiver, Dual Buffered Transmitter
- Programmable Stop Bits in 1/16 Bit Increments
- Internal Bit Rate Generators with 23 Different Bit Rates
- Independent Bit Rate Selection for Each Transmitter and Receiver
- External Clock Capability
- Maximum Bit Rate: 1X Clock - 1Mb/s, 16X Clock - 125Kb/s
- Normal, AUTOECHO, Local LOOPBACK and Remote LOOPBACK Modes
- Multi-function 16 Bit Counter/Timer
- Interrupt Output with Eight Maskable Interrupt Conditions
- Interrupt Vector Output on Acknowledge
- 8 General Purpose Outputs
- 6 General Purpose Inputs with Change of States Detectors on Inputs
- On-chip Oscillator for Crystal
- Standby Mode to Reduce Operating Power
- Compatible with the Motorola MC68681 and the Signetic SCC68692 Devices
- Advanced CMOS Low Power Technology
- Pb-Free, RoHS Compliant Versions Offered
- Multimedia Systems
- Serial to Parallel/Parallel to Serial Converter
- DTE for Modem Communication Systems
Documentation & Design Tools
Type | Title | Version | Date | File Size |
---|---|---|---|---|
Data Sheets | XR68C681 CMOS Dual Channel UART (DUART) | 2.1.0 | September 1999 | 1.4 MB |
Application Notes | DAN-174, Upgrading from XR68C681 to XR68C92 and XR68C192 | 1.0.0 | January 2004 | 40.9 KB |
Application Notes | DAN-122, XR68C681 vs. SCC68692 | 1.0.0 | June 2002 | 30.9 KB |
Application Notes | DAN-101, XR68C681 vs. SCN68681 | 1.0.0 | May 2002 | 20.4 KB |
Application Notes | TAN-012, Comparison between XR68C681 and SCC68692 Duart Devices | 1.0.0 | October 1997 | 50.1 KB |
User Guides & Manuals | Evaluation Board User's Manual | 2.1.0 | August 2003 | 13.4 KB |
Software: Drivers | DOS | 1.0.0 | December 2009 | 1.1 MB |
Product Brochures | Interface Brochure | R01 | June 2024 | 3.6 MB |
Schematics & Design Files | ISA Eval Board Schematic | 2.1.0 | August 2007 | 105 KB |
Simulation Models
Package Type | Vcc | Temp | Mode | Version | File |
---|---|---|---|---|---|
PLCC | 5V | Commercial | Motorola | 1 | |
PLCC | 5V | Commercial | Motorola | 1 | |
PDIP | 5V | Commercial | Motorola | 1 | |
PDIP | 5V | Commercial | Motorola | 1 | |
PLCC | 5V | Industrial | Motorola | 1 | |
PLCC | 5V | Industrial | Motorola | 1 | |
PDIP | 5V | Industrial | Motorola | 1 | |
PDIP | 5V | Industrial | Motorola | 1 | |
CDIP | 5V | Industrial | Motorola | 1 | |
CDIP | 5V | Industrial | Motorola | 1 |
Quality & RoHS
Part Number | RoHS | Exempt | RoHS | Halogen Free | REACH | TSCA | MSL Rating / Peak Reflow | Package |
---|---|---|---|---|---|---|---|
XR68C681CJ-F | N | Y | Y | Y | Y | L1 / 260ᵒC | PLCC44 |
XR68C681J-F | N | Y | Y | Y | Y | L1 / 260ᵒC | PLCC44 |
XR68C681CJTR-F | N | Y | Y | Y | Y | L1 / 260ᵒC | PLCC44 |
Click on the links above to download the Certificate of Non-Use of Hazardous Substances.
Parts & Purchasing
Part Number | Pkg Code | Min Temp | Max Temp | Status | Suggested Replacement | PDN |
---|---|---|---|---|---|---|
XR68C681CJ-F | PLCC44 | 0 | 70 | OBS | ||
XR68C681CJTR-F | PLCC44 | 0 | 70 | OBS | ||
XR68C681CP | PDIP40 | 0 | 70 | OBS | XR68C681CP-F | |
XR68C681CP-F | PDIP40 | 0 | 70 | OBS | XR68C681CJ-F | |
XR68C681J-F | PLCC44 | -40 | 85 | OBS | ||
XR68C681JTR-F | PLCC44 | -40 | 85 | OBS | XR68C681J-F | |
XR68C681P | PDIP40 | -40 | 85 | OBS | XR68C681P-F | |
XR68C681P-F | PDIP40 | -40 | 85 | OBS | XR68C681J-F |
Active - the part is released for sale, standard product.
EOL (End of Life) - the part is no longer being manufactured, there may or may not be inventory still in stock.
CF (Contact Factory) - the part is still active but customers should check with the factory for availability. Longer lead-times may apply.
PRE (Pre-introduction) - the part has not been introduced or the part number is an early version available for sample only.
OBS (Obsolete) - the part is no longer being manufactured and may not be ordered.
NRND (Not Recommended for New Designs) - the part is not recommended for new designs.
Packaging
Pkg Code | Details | Quantities | Dimensions |
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PDIP40 |
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PLCC44 |
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Notifications
FAQs & Support
Search our list of FAQs for answers to common technical questions.
For material content, environmental, quality and reliability questions review the Quality tab or visit our Quality page.
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Please check that all the following conditions are satisfied first.
- no interrupts pending (ISR bit-0 = 1)
- modem inputs are not toggling (MSR bits 0-3 = 0)
- RX input pin is idling HIGH • divisor (the value in DLL register) is non-zero
- TX and RX FIFOs are empty
Be sure sleep mode bit has been set to 1. If there are multiple UART channels, the sleep conditions must be true for all channels.
See more on Sleep Mode in AN204 UART Sleep Mode.
Yes. Note: some devices do have powersave mode. If UART goes into powersave mode, then the registers are not accessible.
See more on Sleep Mode in AN204 UART Sleep Mode.
Read LSR register to check whether the UART receives the data or not.
- If LSR value is 0x60, it means that either UART receiver FIFO doesn’t receive the data or the data in receiver FIFO has been read out before the read of LSR.
- If LSR value is 0x00, it means data is still in the THR (clock doesn’t oscillate to transmit data).
- If LSR value is 0xFF, it means either UART is in powersave mode or UART is powered off. For those devices with powersave mode, be sure that UARTS are not in powersave mode.
See more on Sleep Mode in AN204 UART Sleep Mode.
- Check whether the register set can be accessed.
- Check whether the crystal is oscillating fully.
- Check whether the data can be transmitted in internal loopback mode.
See more on Sleep Mode in AN204 UART Sleep Mode.