XR20V2170

I²C/SPI UART with 64-Byte FIFO and Integrated RS-232 Transceiver
OBS (Obsolete)
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Overview

Information I²C/SPI UART with 64-Byte FIFO and Integrated RS-232 Transceiver
Data Bus Interface I2C/SPI
Max Data Rate 3.3V (Mbps) 0.25
Max Data Rate 2.5V (Mbps) na
Max Data Rate 1.8V (Mbps) na
Auto Flow Control ✔
Auto RS-485 Half-Duplex Control
Multidrop (9-bit) Mode
Fractional Baud Rate Generator
Power Down Mode
Supply Voltage Range VCC (V) 2.97 to 3.63
FIFO Level Counters ✔
5V Tolerant Inputs
Max UART/GPIO Input Voltage (V)
Max UART/GPIO Output Voltage (V)
Tx/Rx FIFO (Bytes) 64/64
Package QFN-40
No. of GPIOs
Integrated Level Shifters
Program. Trigger Levels ✔
Temperature Range (°C) -40 to 85
# of Channels 1
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The XR20V2170¹ (V2170) is a high performance universal asynchronous receiver and transmitter (UART) with 64 byte TX and RX FIFOs, a selectable I²C/SPI slave interface and RS232 transceiver. The V2170 operates from 2.25 to 3.63 volts. It is software compatible to the SC16CIS760/750/740, but with additional features such as a programmable fractional baud rate generator, and 8X and 4X sampling rate that allows for a maximum baud rate of 1 Mbps at 3.3V. The standard features include 16 selectable TX and RX FIFO trigger levels, automatic hardware (RTS/CTS) and software (Xon/Xoff) flow control, and a complete modem interface. Onboard registers provide the user with operational status and data error flags. An internal loopback capability allows system diagnostics. The V2170 is available in the 40-pin QFN.

NOTE: ¹Covered by U.S. Patent #5,649,122


  • 2.25 to 3.6 Volt Operation
  • S/W compatible to Philips' SC16IS760/750/740
  • Selectable I²C/SPI Interface
  • ESD protection for RS-232 I/O pins at
    • +/-15kV - Human Body Model
    • +/-15kV - IEC 61000-4-2, Air-Gap Discharge
    • +/- 8kV - IEC 61000-4-2, Contact Discharge
  • Full-featured UART
    • Data rate of up to 1 Mbps at 3.3V
    • Data rate of up to 1 Mbps at 2.5V
    • Fractional Baud Rate Generator
    • Transmit and Receive FIFOs of 64 bytes
    • 16 Selectable TX and RX FIFO Trigger Levels
    • Automatic Hardware (RTS/CTS) Flow Control
    • Automatic Software (Xon/Xoff) Flow Control
    • Halt and Resume Transmission Control
    • Automatic RS-485 Half-duplex Direction Control Output via RTS#
    • Automatic sleep mode (< 15 uA at 3.3V)
    • General Purpose I/Os
    • Full modem interface
  • Crystal oscillator (up to 24MHz) or external clock (up to 64MHz) input
  • 40-QFN packages
  • Pb-Free, RoHS Compliant Versions Offered

  • Portable Appliances
  • Battery-Operated Devices
  • Cellular Data Devices
  • Factory Automation and Process Controls


Documentation & Design Tools

All Types Application Notes Schematics & Design Files Product Briefs & Brochures Software & Utilities
Type Title Version Date File Size
Application Notes AN-204, UART Sleep Mode 1.0.0 June 2010 515.8 KB
Application Notes DAN-189, MaxLinear UARTs in GPS Applications 1.0.0 April 2008 139 KB
Schematics & Design Files I2C/SPI Eval Board Schematic 1.1.0 July 2007 83.9 KB
Software: Drivers Linux 3.x.x 1.2.0 February 2016 12.5 KB
Product Brochures Interface Brochure October 2019 1.3 MB
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Parts & Purchasing

Part Number Pkg Code Min Temp Max Temp Status Suggested Replacement PDN
XR20V2170IL40-F QFN40 6x6 OPT3 -40 85 OBS XR20M1170IL16-F ,SP3243EUCR-L
XR20V2170IL40TR-F QFN40 6x6 OPT3 -40 85 OBS XR20M1170IL16TR-F ,SP3243EUCR-L/TR
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Part Status Legend
Active - the part is released for sale, standard product.
EOL (End of Life) - the part is no longer being manufactured, there may or may not be inventory still in stock.
CF (Contact Factory) - the part is still active but customers should check with the factory for availability. Longer lead-times may apply.
PRE (Pre-introduction) - the part has not been introduced or the part number is an early version available for sample only.
OBS (Obsolete) - the part is no longer being manufactured and may not be ordered.
NRND (Not Recommended for New Designs) - the part is not recommended for new designs.

Packaging

Pkg Code Details Quantities Dimensions PDF
QFN40 6x6 OPT3
  • JEDEC Reference:
  • MSL Pb-Free: L3 @ 260ºC
  • MSL SnPb Eutectic:
  • ThetaJA: 32.3ºC/W
  • Bulk Pack Style: Tray
  • Quantity per Bulk Pack: 490
  • Quantity per Reel: 3000
  • Quantity per Tube: n/a
  • Quantity per Tray: 490
  • Reel Size (Dia. x Width x Pitch): 330 x 16 x 12
  • Tape & Reel Unit Orientation: Quadrant 1
  • Dimensions: mm
  • Length: 6.0
  • Width: 6.0
  • Thickness: 1.0
  • Lead Pitch: 0.5

Notifications

Distribution Date Description File
08/31/2015 Product discontinuation notification
04/02/2014 Qualified UTAC Thailand for assembly using copper wire or gold wire bonding assembly, in addition to the current qualified gold wire bonding assembly sites, Unisem Batam and UTAC China. Material change and alternate assembly site.

FAQs & Support

Search our list of FAQs for answers to common technical questions.
For material content, environmental, quality and reliability questions review the Quality tab or visit our Quality page.
For ordering information and general customer service visit our Contact Us page.

Submit a Technical Support Question As a New Question

The best way to determine this is to go to maxlinear.com and type the part into the search function. At or near the top of the results you should see something that looks like:
 
 
 

In this example, we looked for XRA1201. Click on part number header or on the link at the bottom of the result.  This brings you to the product page. For example:

 
 
 

Click on Parts & Purchasing, highlighted with the blue arrow above. The screen changes to:

 
 
 

Notice the status column and the “Show obsolete parts” link.  A legend tells you the definition of the different statuses. Click on the “Show obsolete parts” link to see EOL or OBS part numbers along with the Active part numbers, the legend still present:

 
 
 

Another method to find out if a part is OBS or EOL is to click on SUPPORT at the top:

 
 
 

And then Product Change Notifications:

 
  
 

Type the part into the search, and click on one of the part numbers from the drop down menu. Then you can look for the Product Discontinuation Notice, which generally is at the top of the list, for example:

 
 
 

If you see this, it tells you that this particular orderable part has been discontinued and when the last order date is, or was. If you click on the file, then you can view the notice we sent about this if you purchased the part in the recent past. It may also advise of a replacement part. When an orderable part first becomes discontinued, Product Discontinuation Notices are sent are sent to those who have purchased the parts in the recent past, if purchased directly, with a dated opportunity to place a last order.

It depends on the baud rate. For example, for a start bit, 8 data bits, no stop bit and 1 stop bit, the maximum baud rate deviation is 4.76%. For more information, see https://www.exar.com/appnote/dan108.pdf

No, it just has to meet the minimum high and low pulse widths.

LSR bit-6 is a superset of LSR bit-5. The transmitter consists of a TX FIFO (or THR only when FIFOs are not enabled) and a Transmit Shift Register (TSR). When LSR bit-5 is set, it indicates that the TX FIFO (or THR) is empty, however there may be data in the TSR. When LSR bit-6 is set, it indicates that the transmitter (TX FIFO + TSR) is completely empty.

You can tell by reading LSR bit-5 or bit-6. If they are '0', then the transmit interrupt was generated by the trigger level. If they are '1', then the transmit interrupt was generated by the TX FIFO becoming empty. For enhanced UARTs, you can just read the FIFO level counters.

An RX Data Ready interrupt is generated when the number of bytes in the RX FIFO has reached the RX trigger level. An RX Data Timeout interrupt is generated when the RX input has been idle for 4 character + 12 bits time.

For some UARTs, the RX Data Timeout interrupt has a higher priority and in others, the RX Data Ready interrupt has a higher priority. See the interrupt priority section of the datasheet.

The UART requires a clock and a valid baud rate in order to transmit and receive data. Check that there is a clock signal on the XTAL1 input pin. Also, valid divisors need to be written into the DLL and DLM registers. Most UARTs have random (invalid) values upon power-up.

For most UARTs, the interrupt is generated when the data is ready to be read from the RX FIFO. The are some UARTs that generate the interrupt when the character with the error is received. There are some UARTs that have a register bit to select whether the LSR interrupt is generated immediately or delayed until it is ready to be read.

No, Auto RTS and Auto CTS are independent. Auto RTS is toggled by the UART receiver. Auto CTS is monitored by the UART Transmitter.

The UART will enter the sleep mode if the following conditions have been satisfied for all channels:
 
-Sleep Mode is enabled
-No interrupts are pending
-TX and RX FIFOs are empty
-RX input pin is idling HIGH (LOW in IR mode)
-Valid values in DLL and DLM registers
-Modem input pins are idle (MSR bits 3-0=0x0)
 
See AN204, UART Sleep Mode for more information on UART Sleep Mode

The UART will wake-up from sleep mode by any of the following conditions on any channel:
 
-Sleep mode is disabled
-Interrupt is generated
-Data is written into THR
-There is activity on the RX input pin
-There is activity on the modem input pins
 
If the sleep mode is still enabled and all wake-up conditions have been cleared, it will return to the sleep mode.
 
See AN204, UART Sleep Mode for more information on UART Sleep Mode 

There will be no activity on the XTAL2 output.
 
See AN204, UART Sleep Mode for more information on UART Sleep Mode 

For any UART that has the wake-up indicator interrupt, an interrupt will be generated when the UART wakes up even if no other interrupts are enabled.
 
See AN204, UART Sleep Mode for more information on UART Sleep Mode 

No, Auto RTS and Auto CTS will work normally without the interrupts enabled.

Auto RS485 Half-Duplex Control feature overrides the Auto RTS flow control feature if both features use the RTS# output pin. Both features can only be used simultaneously if the Auto RS485 control output is not the RTS# output. For some UARTs, the Auto RS485 control output is not the RTS# output.

No, software flow control characters are not loaded into the RX FIFO.

Since 2-character software flow control requires that 2 consecutive flow control characters match before data transmission is stopped or resumes, there is less of a chance that data transmission is stopped because one data byte matched a control character.

The polarity of the RS485 control output varies from one UART to another. For some UARTs, an inverter may be required. Some of the newer UARTs have register bits that can change that polarity of the RS485 control output.

It is recommended that the FIFO counters at the Scratchpad Register location be used. When transmitting or receiving data, writing to the LCR register could result in transmit and/or receive data errors.

Due to the dynamic nature of the FIFO counters, it is recommended that the FIFO counter registers be read until consecutive reads return the same value.

In the normal mode, the TX interrupt is generated when the TX FIFO is empty, and there may still be data in the Transmit Shift Register. In the RS485 mode, the TX interrupt is generated when the TX FIFO and the TSR register are both empty.

All of the UARTs that have the IR mode supports up to 115.2Kbps as specified in IrDA 1.0. The newer I2C/SPI UARTs can support up to 1.152Mbps as specified in IrDA 1.1.

Yes. Note: some devices do have powersave mode. If UART goes into powersave mode, then the registers are not accessible.

 

See more on Sleep Mode in AN204 UART Sleep Mode.

 

  • Check whether the register set can be accessed.
  • Check whether the crystal is oscillating fully.
  • Check whether the data can be transmitted in internal loopback mode.

 

 

See more on Sleep Mode in AN204 UART Sleep Mode.

Please check that all the following conditions are satisfied first.

 

  • no interrupts pending (ISR bit-0 = 1)
  • modem inputs are not toggling (MSR bits 0-3 = 0)
  • RX input pin is idling HIGH • divisor (the value in DLL register) is non-zero
  • TX and RX FIFOs are empty

 

Be sure sleep mode bit has been set to 1. If there are multiple UART channels, the sleep conditions must be true for all channels.

 

See more on Sleep Mode in AN204 UART Sleep Mode.

Read LSR register to check whether the UART receives the data or not.

 

  • If LSR value is 0x60, it means that either UART receiver FIFO doesn’t receive the data or the data in receiver FIFO has been read out before the read of LSR.
  • If LSR value is 0x00, it means data is still in the THR (clock doesn’t oscillate to transmit data).
  • If LSR value is 0xFF, it means either UART is in powersave mode or UART is powered off. For those devices with powersave mode, be sure that UARTS are not in powersave mode.

 

 

See more on Sleep Mode in AN204 UART Sleep Mode.