XR17V258

66 MHz Octal PCI UART

Data Sheets OBS (Obsolete)

Overview

Information	66 MHz Octal PCI UART
Data Bus Interface	PCI Bus 3.0
# of Channels	8
Max Data Rate 5V (Mbps)	na
Max Data Rate 3.3V (Mbps)	8
Tx/Rx FIFO (Bytes)	64/64
FIFO Level Counters	✔
Program. Trigger Levels	✔
Auto Flow Control	✔
Auto RS-485 Half-Duplex Control	✔
Fractional Baud Rate Generator	✔
Power Down Mode	✔
5V Tolerant Inputs	✔
Supply Voltage Range VCC (V)	3 to 3.6
No. of GPIOs	8
PCI Interface Supply Voltage Range VIO (V)	3 to 3.6
Max UART/GPIO Input Voltage (V)	6
Max UART/GPIO Output Voltage (V)	VCC
Temperature Range (°C)	-40 to 85
Package	LQFP-144

The XR17V258¹ (V258) is a single chip 8-channel 66MHz PCI (Peripheral Component Interconnect) UART (Universal Asynchronous Receiver and Transmitter) solution, optimized for higher performance and lower power. The V258 device with its fifth generation register set is designed to meet the high bandwidth and power management requirements for multi-serial communication ports for system administration and management. The 32-bit 66MHz PCI interface is compliant with PCI 3.0 and PCI power management revision 1.1 specifications. The device provides an upgrade path for MaxLinear’s 33MHz 5V and Universal PCI UART family of products in a 144-pin LQFP package.

The V258 consists of eight independent UART channels, each with set of configuration and enhanced registers, 64 bytes of Transmit (TX) and Receive (RX) FIFOs, and a fractional Baud Rate Generator (BRG). A global interrupt source register provides a complete interrupt status indication for all 8-channels to speed up interrupt parsing. The V258 device operates at 33/66MHz and features fully programmable TX and RX FIFO level triggers, automatic hardware and software flow control, and automatic RS-485 half duplex direction control output for software and hardware design simplification.

Note: ¹ Covered by U.S. Patents #5,649,122 and #5,949,787

High performance 32-bit 66MHz PCI UART
PCI 3.0 compliance
PCI power management rev. 1.1 compliance
EEPROM interface for PCI configuration
3.3V supply with 5V tolerant non-PCI (serial) inputs
Data read/write burst operation
Global interrupt register for all eight UART channels
Up to 8 Mbps serial data rate
Eight multi-purpose inputs/outputs
A 16-bit general purpose timer/counter
Sleep mode with wake-up Indicator
Eight independent UART channels controlled with
- 16C550 compatible register Set
- 64-byte TX and RX FIFOs with level counters and programmable trigger levels
- Fractional baud rate generator
- Automatic RTS/CTS or DTR/DSR hardware flow control with programmable hysteresis
- Automatic Xon/Xoff software flow control
- RS-485 half duplex direction control output with selectable turn-around delay
- Infrared (IrDA 1.0) data encoder/decoder
- Programmable data rate with prescaler
Pb-Free, RoHS Compliant Versions Offered

Remote Access Servers
Storage Network Management
Factory Automation and Process Control
Instrumentation
Multi-port RS-232/RS-422/RS-485 Cards
Point-of-Sale Systems

Documentation & Design Tools

All Types Data Sheets Application Notes Schematics & Design Files Product Briefs & Brochures Software & Utilities Design Tools & Simulation User Guides & Manuals

Type	Title	Version	Date	File Size
Data Sheets	XR17V258 66MHZ PCI BUS Octal UART with Power Management Support	1.0.2	August 2010	1.5 MB
Application Notes	AN-225, Installing and Testing a PCI/PCIe UART Serial Port Using a Custom MaxLinear Driver in Linux	1B	July 2018	427.1 KB
Application Notes	AN 209 - Windows & Linux API interface code for PCI/PCIe UARTs’ drivers		December 2011	199.5 KB
Application Notes	AN-204, UART Sleep Mode	1.0.0	June 2010	515.8 KB
Application Notes	DAN-189, MaxLinear UARTs in GPS Applications	1.0.0	April 2008	139 KB
Application Notes	DAN-183, Migrating from the XR17D15X to the XR17V25X	1.0.0	September 2005	88.3 KB
Application Notes	DAN-112, PCI UART - EEPROM Interface		June 2003	36.8 KB
User Guides & Manuals	PCI/PCIe EEPROM Programming Utility User Manual	1.0.0	November 2010	262.5 KB
Software: GUIs & Utilities	PCI UART EEPROM Programming Utility		July 2017	10.9 KB
Product Flyers	66 MHz 32-bit PCI Bus Dual, Quad and Octal UARTs	1.0.0	August 2006	302.4 KB
Software: Drivers	Windows 10	5.5.0.0	September 2020	319.1 KB
Software: Drivers	Linux 2.6.32 and newer	2.6.0.0	August 2019	20.2 KB
Software: Drivers	Windows XP, Vista, 7, 8, 8.1	5.3.0.0	September 2015	275.2 KB
Software: Drivers	Linux 2.6.31	1.0.0	June 2010	12.7 KB
Software: Drivers	Linux 2.4.x	1.0.0	December 2009	894.7 KB
Software: Drivers	Linux 2.6.16	1.0.0	December 2009	12.8 KB
Software: Drivers	Linux 2.6.18	1.0.0	December 2009	12.7 KB
Software: Drivers	Linux 2.6.21	1.0.0	December 2009	12.8 KB
Software: Drivers	Linux 2.6.8	1.0.0	December 2009	17.4 KB
Schematics & Design Files	PCI Eval Board Schematic	1.1.0	July 2007	126.3 KB
Product Brochures	Serial Transceivers & Bridges Brochure	R03	May 2025	3.6 MB

Simulation Models

IBIS Models

Package Type	Vcc	Temp	Mode	Version	File
LQFP	3.3V	Industrial	PCI	1

Quality & RoHS

Part Number	RoHS \| Exempt	RoHS	Halogen Free	REACH	TSCA	MSL Rating / Peak Reflow	Package
XR17V258IV-F	N	Y	Y	Y	Y	L3 / 260ᵒC	LQFP144

Click on the links above to download the Certificate of Non-Use of Hazardous Substances.

Additional Quality Documentation may be available, please Contact Support.

Parts & Purchasing

Part Number	Pkg Code	Min Temp	Max Temp	Status	Suggested Replacement
XR17V258IV	LQFP144	-40	85	OBS
XR17V258IV-F	LQFP144	-40	85	OBS	XR17V358IB176-F
XR17V258IVTR-F	LQFP144	-40	85	OBS

Show obsolete parts

Part Status Legend
Active - the part is released for sale, standard product.
EOL (End of Life) - the part is no longer being manufactured, there may or may not be inventory still in stock.
CF (Contact Factory) - the part is still active but customers should check with the factory for availability. Longer lead-times may apply.
PRE (Pre-introduction) - the part has not been introduced or the part number is an early version available for sample only.
OBS (Obsolete) - the part is no longer being manufactured and may not be ordered.
NRND (Not Recommended for New Designs) - the part is not recommended for new designs.

Packaging

Pkg Code	Details	Quantities	Dimensions
LQFP144	JEDEC Reference: MO-026 MSL Pb-Free: L3 @ 260ºC MSL SnPb Eutectic: n/a ThetaJA: 24.0ºC/W	Bulk Pack Style: Tray Quantity per Bulk Pack: 60 Quantity per Reel: 750 Quantity per Tube: n/a Quantity per Tray: 60 Reel Size (Dia. x Width x Pitch): 330 x 44 x 32 Tape & Reel Unit Orientation: Quadrant 2	Dimensions: mm Length: 20 Width: 20 Thickness: 1.60 Lead Pitch: 0.50

Notifications

Distribution Date	Description	File
08/18/2022	Product Discontinuation Notice
06/23/2022	Product Discontinuation Notice
12/21/2016	Qualification of an alternate production site, TSHT, China for 144L SQFP.
07/26/2016	Product discontinuation notification. Discontinued.
12/05/2013	Addition of an alternate qualified assembly site, ASE Chung-Li (Taiwan) for assembly using copper or gold wire bonding. Material change and alternate assembly site.
08/10/2011	Material change and a new assembly & test supplier (ASE, Kunshan). Business consolidation.
04/11/2011	Product Discontinuation Notice In support of “green” initiatives, the listed leaded part numbers will be discontinued by Exar.

FAQs & Support

Search our list of FAQs for answers to common technical questions.
For material content, environmental, quality and reliability questions review the Quality tab or visit our Quality page.
For ordering information and general customer service visit our Contact Us page.

Submit a Technical Support Question As a New Question

For some UARTs, Microsoft certified drivers are available for Windows Operating System and can be downloaded via Windows Update. These drivers and others, including for Linux and other Operating Systems can be found by visiting https://www.exar.com/design-tools/software-drivers Please note Software Driver Use Terms.

You can also get to this link by going to the exar.com website, clicking on Support (in black bar near top of page), then click on Design Tools, then under Evaluation Hardware and Software (towards right of page) click on Software Drivers.

Click on the version link under Driver Version of the desired type of UART, part number and operating system. A zip file is downloaded which contains a ReadMe file with instructions.

Links to datasheets and product family pages are in the software driver table for easy reference.

The XR17Cxxx, XR17Dxxx, and XR17Vxxx are all UARTs but have the following basic differences:

PCI UARTs

XR17Cxxx – 5V supply, up to 33MHz clock input
XR17Dxxx – 5V or 3.3V supply, up to 33MHz clock input
XR17V2xx – 3.3V supply, up to 66MHz clock input

PCIe UARTs

XR17V3xx – 3.3V supply, up to 125MHz clock input

Yes, however, you will need to use a PCI-PCI bridge.

The schematics for our evaluation boards are available for download from https://www.exar.com/technical-documentation?doctypeid=34

No, it is not required. If an external EEPROM is not detected, the PCI UARTs will use Exar's default Vendor and Device ID. However, we do recommend that you use an EEPROM with your own Vendor and Device IDs.

You will need to be a member of PCI-SIG. You can find information for becoming a member at www.pcisig.com.

LSR bit-6 is a superset of LSR bit-5. The transmitter consists of a TX FIFO (or THR only when FIFOs are not enabled) and a Transmit Shift Register (TSR). When LSR bit-5 is set, it indicates that the TX FIFO (or THR) is empty, however there may be data in the TSR. When LSR bit-6 is set, it indicates that the transmitter (TX FIFO + TSR) is completely empty.

You can tell by reading LSR bit-5 or bit-6. If they are '0', then the transmit interrupt was generated by the trigger level. If they are '1', then the transmit interrupt was generated by the TX FIFO becoming empty. For enhanced UARTs, you can just read the FIFO level counters.

An RX Data Ready interrupt is generated when the number of bytes in the RX FIFO has reached the RX trigger level. An RX Data Timeout interrupt is generated when the RX input has been idle for 4 character + 12 bits time.

For some UARTs, the RX Data Timeout interrupt has a higher priority and in others, the RX Data Ready interrupt has a higher priority. See the interrupt priority section of the datasheet.

The UART requires a clock and a valid baud rate in order to transmit and receive data. Check that there is a clock signal on the XTAL1 input pin. Also, valid divisors need to be written into the DLL and DLM registers. Most UARTs have random (invalid) values upon power-up.

For most UARTs, the interrupt is generated when the data is ready to be read from the RX FIFO. The are some UARTs that generate the interrupt when the character with the error is received. There are some UARTs that have a register bit to select whether the LSR interrupt is generated immediately or delayed until it is ready to be read.

The UART will enter the sleep mode if the following conditions have been satisfied for all channels:

-Sleep Mode is enabled

-No interrupts are pending

-TX and RX FIFOs are empty

-RX input pin is idling HIGH (LOW in IR mode)

-Valid values in DLL and DLM registers

-Modem input pins are idle (MSR bits 3-0=0x0)

See AN204, UART Sleep Mode for more information on UART Sleep Mode

The UART will wake-up from sleep mode by any of the following conditions on any channel:

-Sleep mode is disabled

-Interrupt is generated

-Data is written into THR

-There is activity on the RX input pin

-There is activity on the modem input pins

If the sleep mode is still enabled and all wake-up conditions have been cleared, it will return to the sleep mode.

See AN204, UART Sleep Mode for more information on UART Sleep Mode

There will be no activity on the XTAL2 output.

See AN204, UART Sleep Mode for more information on UART Sleep Mode

For any UART that has the wake-up indicator interrupt, an interrupt will be generated when the UART wakes up even if no other interrupts are enabled.

See AN204, UART Sleep Mode for more information on UART Sleep Mode

No, Auto RTS and Auto CTS are independent. Auto RTS is toggled by the UART receiver. Auto CTS is monitored by the UART Transmitter.

No, Auto RTS and Auto CTS will work normally without the interrupts enabled.

No, software flow control characters are not loaded into the RX FIFO.

Since 2-character software flow control requires that 2 consecutive flow control characters match before data transmission is stopped or resumes, there is less of a chance that data transmission is stopped because one data byte matched a control character.

Auto RS485 Half-Duplex Control feature overrides the Auto RTS flow control feature if both features use the RTS# output pin. Both features can only be used simultaneously if the Auto RS485 control output is not the RTS# output. For some UARTs, the Auto RS485 control output is not the RTS# output.

The polarity of the RS485 control output varies from one UART to another. For some UARTs, an inverter may be required. Some of the newer UARTs have register bits that can change that polarity of the RS485 control output.

In the normal mode, the TX interrupt is generated when the TX FIFO is empty, and there may still be data in the Transmit Shift Register. In the RS485 mode, the TX interrupt is generated when the TX FIFO and the TSR register are both empty.

It is recommended that the FIFO counters at the Scratchpad Register location be used. When transmitting or receiving data, writing to the LCR register could result in transmit and/or receive data errors.

Due to the dynamic nature of the FIFO counters, it is recommended that the FIFO counter registers be read until consecutive reads return the same value.

All of the UARTs that have the IR mode supports up to 115.2Kbps as specified in IrDA 1.0. The newer I2C/SPI UARTs can support up to 1.152Mbps as specified in IrDA 1.1.

For external clock frequencies above 24MHz at the XTAL1 input, a 2K pull-up may be necessary to improve the rise times if there are data transmission errors.

No, it just has to meet the minimum high and low pulse widths.

Yes, if you are using a UART with a fractional baud rate generator. This provides a divisor feature with a granularity of 1/16, allowing for any baud rate to be generated by any clock frequency, standard or non-standard. Click on the parametric search button of the product family page and find the Fractional Baud Rate Generator column which tells which products have this feature.

The -F suffix indicates ROHS / Green compliance:
https://www.exar.com/quality-assurance-and-reliability/lead-free-program

Visit the product page for the part you are interested in. The part's status is listed in the Parts & Purchasing section. You can also view Product Lifecycle and Obsolescence Information including PDNs (Product Discontinuation Notifications).

To visit a product page, type the part into the search window on the top of the MaxLinear website.

In this example, we searched for XR33180. Visit the product page by clicking the part number or visit the orderable parts list by clicking "Orderable Parts".

The Parts & Purchasing section of the product page shows the Status of all orderable part numbers for that product. Click Show obsolete parts, to see all EOL or OBS products.

1. Native drivers: Native drivers may be found in all major OS such as Windows, Linux, and Max OSX. Typically these drivers will be automatically loaded. In some cases, these are basic drivers and may have limitations on advanced device functionality, however. USB HID, Hub and CDC-ACM drivers are examples of native drivers. The CDC-ACM driver be used with our CDC-ACM class USB UARTs, but has limited functionality.

2. MaxLinear custom drivers: MaxLinear custom drivers may be used to support additional functionality in MaxLinear devices. For example, the MaxLinear custom driver for USB UARTs overcomes the limitations of the native CDC-ACM driver. See https://www.exar.com/design-tools/software-drivers for a list of and access to the drivers that we currently have. In some cases, the MaxLinear driver can also be customized, or source code can be provided after executing a Software License Agreement.

It depends on the baud rate. For example, for a start bit, 8 data bits, no stop bit and 1 stop bit, the maximum baud rate deviation is 4.76%. For more information, see https://www.exar.com/appnote/dan108.pdf

See Application Note AN-225 https://www.exar.com/appnote/an-225.pdf

Most UARTs use RTS#, however in addition to using the RTS# output as the Auto RS485 control output, the XR17C158, XR17D152/154/158 and XR17V258 can use the DTR# output as the Auto RS485 control output.

The EEPROM needs to have the PCI Vendor ID and Device ID, Subvendor ID and Subsystem Device ID. For more details, see DAN112 https://www.exar.com/appnote/dan112v100.pdf.

Please check that all the following conditions are satisfied first.

no interrupts pending (ISR bit-0 = 1)
modem inputs are not toggling (MSR bits 0-3 = 0)
RX input pin is idling HIGH • divisor (the value in DLL register) is non-zero
TX and RX FIFOs are empty

Be sure sleep mode bit has been set to 1. If there are multiple UART channels, the sleep conditions must be true for all channels.

See more on Sleep Mode in AN204 UART Sleep Mode.

Yes. Note: some devices do have powersave mode. If UART goes into powersave mode, then the registers are not accessible.

See more on Sleep Mode in AN204 UART Sleep Mode.

Read LSR register to check whether the UART receives the data or not.

If LSR value is 0x60, it means that either UART receiver FIFO doesn’t receive the data or the data in receiver FIFO has been read out before the read of LSR.
If LSR value is 0x00, it means data is still in the THR (clock doesn’t oscillate to transmit data).
If LSR value is 0xFF, it means either UART is in powersave mode or UART is powered off. For those devices with powersave mode, be sure that UARTS are not in powersave mode.

See more on Sleep Mode in AN204 UART Sleep Mode.

Check whether the register set can be accessed.
Check whether the crystal is oscillating fully.
Check whether the data can be transmitted in internal loopback mode.

See more on Sleep Mode in AN204 UART Sleep Mode.

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Knowledgebase (FAQs)

Contact Support

XR17V258

Overview

Documentation & Design Tools

Simulation Models

Quality & RoHS

Parts & Purchasing

Packaging

Notifications

FAQs & Support

Popular Support Links

Knowledgebase (FAQs)

Contact Support

XR17V258

Overview

Documentation & Design Tools

Simulation Models

Quality & RoHS

Parts & Purchasing

Packaging

Notifications

FAQs & Support

How do I get a driver for my UART?

What are the differences between the XR17Cxxx, XR17Dxxx and XR17Vxxx families?

Can we use 2 PCI UARTs on an add-in card?

Are there any reference designs available?

Is an external EEPROM required for the PCI UARTs?

How can my company get a PCI Vendor ID?

What is the difference between LSR bit-6 and LSR bit-5?

When a Transmit interrupt is generated (ISR = 0xC2), how do I know if it was generated because the TX FIFO is below the trigger level or if the TX FIFO is empty? (This applies only to UARTs with TX FIFO Trigger Levels.)

What is the difference between a RX Data Ready interrupt and a RX Data Timeout interrupt?

Which interrupt has a higher priority? The RX Data Ready interrupt or RX Data Timeout interrupt?

I am not able to transmit or receive data, what could be wrong?

If a character with an error is received, is an LSR interrupt generated immediately or when the character is ready to be read from the RX FIFO?

What conditions are required for enabling the sleep mode in UARTs?

How can the UART wake-up from sleep mode?

How can I tell if the UART is in the sleep mode?

Will I receive an interrupt when the UART wakes up from sleep mode if all interrupts are disabled?

Do I need to enable both the UART's Auto RTS and Auto CTS?

Do I need to enable the UART's Auto RTS and Auto CTS interrupts for Auto RTS and Auto CTS to function properly?

Are software flow control characters loaded into the RX FIFO of the UART?

What is the advantage of using the UART's 2-character software flow control?

Can I use Auto RTS flow control when Auto RS485 Half-Duplex Control is used?

In Auto RS485 Half-Duplex control, what is the polarity of the RS485 control output?

In Auto RS485 Half-Duplex control, how does enabling the RS485 mode change the behavior of the interrupt?

In some UARTs, there are 2 sets of FIFO counters. One set is located at the Scratchpad Register location and the other is accessible when LCR = 0xBF. Which one should I use?

What is the recommended way for reading the FIFO Counters in the UART?

What is the maximum data rate supported by the IR Mode in the UART?

When is a 2K pull-up on the XTAL2 output of the UART recommended?

When using an external clock for the UART, does the duty cycle of the clock have to be 50-50%?

Can I use a non-standard clock frequency with the UART and still transmit/receive at standard baud rates?

What does the -F suffix on the part number mean?

How can I find out if the status of a part number is EOL / obsolete or active?

What are the different categories of drivers?

What is the maximum deviation that the UART can tolerate without receiving errors?

How do you install and test a PCIe UART serial port using a custom MaxLInear driver in Linux?

In auto RS485 Half-Duplex Control, which PCI UARTs can use some other outputs besides RTS# as the RS485 control output?

What should be programmed on to the external EEPROM?

After enabling sleep mode, the UART isn't going to sleep. Why?

Can registers be read or written to in sleep mode?

Writing a byte of data to the UART doesn't wake it from sleep mode. Why?

After the UART wakes up, it can't transmit and receive data. What should be checked?

IBIS/BSDL User Agreement